Traditional router architectures are becoming increasingly complex today as more and more features are being added to the Internet control plane. Many operational tasks such as routing policy enforcement or traffic engineering require network-wide control that is difficult and cumbersome to achieve in a network of autonomous and complex routers. Moreover, current routers have the route controllers tightly coupled with the forwarding engine and this static binding often results in shared failures.
Despite the end-to-end architecture design principle that aims at a simple core network, as new features are being standardized, more and more control plane complexity is being added at the routers. These features include routing (e.g., BGP-based MPLS-VPNs), traffic engineering (TE) (e.g., open shortest path first (OSPF)-TE), security, and the like. In contrast, the forwarding path implementation has progressively become easier with rapid advances in large-scale hardware integration (e.g., ASIC) and ready availability of off-the-shelf chips.
Traditional IP networks are constructed using routers that operate relatively autonomously. The potentially unmanageable complexity is present at many points all over the network. This has many undesirable consequences. First, the multiple points of control significantly increase operational complexity (e.g., misconfiguration). Second, in certain circumstances, uncoordinated actions of these autonomous routers can lead to sub-optimal performance (e.g., poor recovery time) at best and network instability in the worst case. Finally, the introduction of new features may require upgrades to a large number of routers, which is both complex and error-prone.
Traditional router architectures have integrated control and forwarding. The control processors implementing control plane functions are co-located with the line cards that implement forwarding functions and often share the same router backplane. The control processors provide control functions only to the co-located line cards, and vice-versa, leading to a scenario where the line cards cannot be managed when there is a failure of the co-located controller(s).